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Evidence Against Evidence: CERN-IEEE FPGA vs. Crosetto 3D-Flow, a Breakthrough Invention Recognized 32 Years Ago That Could Have, and Can Still, Save Billions of Euros and Millions of Lives

DALLAS, Oct. 28, 2025 (GLOBE NEWSWIRE) -- (In PDF https://bit.ly/3X0mZOg) The Crosetto Foundation for the Reduction of Cancer Deaths, a registered non-profit organization, is issuing an open letter addressed to CERN, IEEE, and the entire scientific community. To uphold scientific integrity and defend the interests of taxpayers and cancer patients, the Foundation is presenting a rebuttal from Italian-American scientist Dario Crosetto to the latest communications. These communications involved the 2024 IEEE-NSS-MIC-RTSD keynote speaker, the current and elect Presidents of IEEE-NPSS (including those of 2016), the 2019 IEEE President-Elect, all other IEEE Presidents whom he has kept informed since 2016, and the CERN Director General, whom he has informed over the past decade without receiving a response.

A Media Snippet accompanying this announcement is available by clicking on this link.

CERN’s and IEEE’s 32-Year Blunder

The suppression of the 3D-Flow invention — a breakthrough recognized in 1993 that could have saved billions of euros and millions of lives—instead supported the use of FPGA for an application that is not meant for. This decision caused over $4 billion in taxpayer waste and will cause over $12 billion in taxpayer waste over the next decade if the 20 trillion transistors, 650 kW CERN-CMS FPGA and all similar systems are not discarded, because:

Even by increasing the parallelism of circuits in FPGAs, it creates a self-defeating cycle of more routing transistors, slowing down algorithm execution while increasing power consumption. This makes it impossible to execute complex pattern recognition algorithms on ultra-high input data rates with no data loss.

Crosetto’s response to Dr. Aarrestad

The Supremacy of Scientific Evidence

Science is the recognition of evidence and the laws of nature.

It is not determined by popular majority consensus, nor by the opinion of ‘a large, structured CMS collaboration of several thousand members,’ nor by CERN’s community of over 14,000 scientists, nor even by IEEE’s 480,000 professionals across various disciplines — particularly when these institutions have not yet authorized a transparent, public scientific review comparing FPGA-based systems with my 3D-Flow invention for pattern recognition of objects from data arriving at ultra-high speed.

Thank you for reiterating your position, which actually confirms the core of my concern. I fully agree that Meaningful scientific progress depends on constructive, collegial dialogue and established processes of peer review and collaboration.’

However, your refusal to engage, citing these processes, is precisely where your statement collapses under logical scrutiny —and under the very history of scientific integrity that you claim to uphold.

The CMS Trigger system may be developed by a collaboration of thousands, but scientific validity is not determined by the number of people in the collaboration.

Scientific Integrity vs. Institutional Authority

Consider the historical precedent:

  • Einstein's Blunder: When Einstein introduced the cosmological constant in 1917, he defended his theory for 14 years. He did not claim that only his ‘collaboration’ could discuss alternatives. In 1931, he admitted it was his ‘biggest blunder’ because new evidence overruled his authoritative, yet flawed, theory. He demonstrated scientific integrity.

  • Lord Kelvin’ Blunder: He did not reject the findings of a few physicists on radioactivity because they failed to follow his ‘established process.’ In the end, the evidence forced acceptance of a much older Earth — ~4.55 billion years instead of his earlier calculation of 20 to 30 million years. He demonstrated scientific integrity.

  • Your Analogy: Your claim that individual researchers ‘cannot independently organize or authorize... technical reviews’ is a political statement about process, not a scientific statement about evidence. If the measurements of the shadow by a 12-year-old prove the Earth is spherical, the entire astronomical community must engage with that evidence or risk discrediting themselves—regardless of whether the child is an ‘authorized collaborator.’ The power of the child’s result comes from the shadow length measurements, which, when confronted with logical reasoning and the laws of nature, determines the truth.

The Obligation of Publicly Funded Experts

Especially you, Ms. Aarrestad, as keynote speaker and an expert paid with public funds, who has already chosen to influence the technical direction of the field by presenting FPGAs as the optimal solution, you have implicitly asserted their performance as superior to all viable alternatives, including the 3D-Flow.

Therefore, in the interest of collegial dialogue, scientific integrity, and respect for taxpayer funds invested in this research, your responsibility is not to simply refuse dialogue, but to:

  1. Justify the Current Technology: Demonstrate through logical reasoning and the laws of nature that the current FPGA architecture can efficiently and cost-effectively filter specific events (objects) from 1.2 billion (LHC) to 8 billion (HL-LHC) collisions per second. Based on the FPGA architecture shown in Figures 39 and 40, Table VIII (p. 49), and Table VI (p. 48) of [https://bit.ly/4e1uURA], you must conceptually explain how the FPGA architecture meets these requirements and counter my detailed refutation (see Sections 6.8, 6.9, 6.9.3, 6.9.4, 6.9.5, 7.2, 7.3, 8, 9.1, 9.1.1, 9.1.2, 9.1.3 of [https://bit.ly/4p0DneC]). My refutation demonstrates that, even by increasing parallelism it could never cope with the high input data rate and the execution of complex algorithms without data loss, because it will create a self-defeating cycle of more routing transistors slowing down algorithmic execution while increasing power consumption. Not even a 200 trillion transistor FPGA system consuming megawatts could execute Level-2 Trigger algorithms at Level-1.

    FPGAs are built on a structure of logic blocks interconnected by a vast, flexible routing network.

    The Problem: The limitation of FPGAs stems from their extensive, general-purpose routing network. When implementing highly complex algorithms (such as advanced pattern recognition Level-2 Trigger algorithms at Level-1) that require intensive communication between logic blocks, the routing network becomes the dominant limiting factor.

    These inherent FPGA architectural limits are the technical and scientific reasons why the 20-trillion-transistor, 650 kW CERN-CMS FPGA system, just built for 2026-2036 CERN experiments, and all similar systems, must be discarded. Their use will result in an estimated $12 billion in taxpayer waste over the next decade.

    See more details, including tables and figures illustrating the FPGA architecture, in APPENDIC C.

  2. Quantify FPGA Performance and cost: Specifically determine for the 20 trillion transistor, 650 kW CERN-CMS Level-1 Trigger system that you presented as keynote speaker at the 2024 IEEE-NSS-MIC-RTSD Conference :
    • How many programmable operations (add, subtract, compare, multiply, move, etc.) can the system execute on each dataset arriving at each electronic channel every 25 nanoseconds with no data loss?

    • What is the cost per channel per board and per crate?

    • These two parameters — (1) the number of operations and (2) the cost per channel/board/crate — should then be directly compared with the 3D-Flow system.

3. Can you Refute 3D-Flow Evidence? Can you refute Crosetto’s documented calculations in the public press release (August 2025 [https://bit.ly/4p0DneC]?; see Executive Summary pp. 1-4, and technical sections: 4.1, 6.3, 7, 10, 14.1.6, 14.1.7, 17.2) and the 82-page article (April 2025 [https://bit.ly/4e1uURA]). This documentation shows the 3D-Flow architecture (described on pp. 34-44, Figures 21-30) and its practical implementation (pp. 74-76) meet all Level-1 Trigger requirements, capable of executing Level-2 programmable algorithms at Level-1.

    • Medical Impact: The 3D-Flow invention, capable of filtering valuable data from radiation when used in medical imaging, specifically in the 3D-CBS (3D Complete Body Screening), an advanced PET/CT (Positron Emission Tomography) device, it filters valuable data from radiation associated with tumor markers. This allows for the cost-effective, early detection of many diseases, including cancer, ultimately saving lives.

    • 3D-Flow Parameters (for Refutation): The values in the table below (supported in the above cited documentation) that the keynote speaker, 14,000 scientists at CERN, 480,000 IEEE professionals, and experts appointed by the CERN Director General and IEEE Presidents need to refute if they do not agree are:
ConfigurationOperations per ChannelCost per Channel (Board)Cost per Channel (Crate*)
128 channels9,600 ops per dataset$54$83
256 channels4,800 ops per dataset$27$41
512 channels2,400 ops per dataset$13$20

* Crate cost includes the crate, channel-reduction board, and CPU controller.

___________________________________________

The Urgency of Funding the Inventor

The 3D-Flow invention was recognized as a breakthrough in 1993 for solving this exact problem. Over the years, and still today, it demonstrates clear superiority in efficiency and cost-effectiveness compared to any alternative approach or design.

Despite receiving $1 million for the successful feasibility study, implementation funding for the 3D-Flow chip and boards has yet to be allocated.

Given the magnitude of the problem and the unrefuted calculations and claims of the 3D-Flow for three decades, and considering the $2 trillion annual global funding for Research & Development (and over $30 trillion already spent since Crosetto’s inventions), dedicated funding is urgently requested.

The funding must be provided directly to Crosetto as the inventor—not to fund the 3D-Flow or 3D-CBS projects themselves—to prevent the money from being diverted to individuals who plagiarize or copy Crosetto’s work for unrelated objectives, as has occurred in the past.

This funding will be used to achieve three high-impact objectives:

  1. Build the 3D-Flow chip and boards that will serve as the core building blocks for a universal Level-1 Trigger, meeting the requirements of all CERN experiments until 2042.

  2. Construct two 3D-CBS devices for experimental demonstration.

  3. Allowing Crosetto to demonstrate experimentally their ability to halve premature cancer deaths, with the potential to save millions of lives and billions of Euros.

Conclusion: Failure of Dialogue

This is the established process of scientific progress: evidence confronting evidence. Any refusal to engage with verifiable, data-driven claims simply because they arrive outside a specific, exclusive email thread or meeting room is the very definition of a failure of collegial dialogue and scientific integrity.

Crosetto’s data and arguments remain public for review and are being shared with the relevant institutional oversight bodies.

Out of respect to Ms. Aarrestad, CERN and IEEE leaders in the field, Crosetto is sending them this information.

While he cannot compel anyone to read or acknowledge the evidence he provides, CERN and IEEE officials who hold positions of responsibility cannot evade their scientific duty to defend the technical basis of their public statements and official documents — including those in https://cds.cern.ch/record/2714892/files/CMS-TDR-021.pdf — against proven alternatives.

Ms. Aarrestad, you cannot be removed from the scientific responsibility to defend the technical basis of your public talks.

__________________________________________

Thirty-Two Years of Suppression and Continuing Barriers to Transparency

Out of respect for taxpayers, cancer patients, and for scientific integrity, Crosetto Foundation is issuing a press release to inform the public — the people who ultimately finance this research.

It took 14 years (1917 to 1931) for Einstein's error to be recognized. It has now been 32 years since the official formal recognition of Crosetto’s 3D-Flow breakthrough invention at Fermilab in 1993. Considering that modern communication can instantly reach millions of scientists worldwide, taking responsibility to address and resolve this contradiction in science is long overdue.

Crosetto has done, and continue to do, everything possible to inform his colleagues; yet unlike historical precedents, this case lacks scientific integrity within major institutions. The contradiction persists because of active suppression of Crosetto’s papers and of funding needed for experimental proof.

After receiving a $1 million U.S. DOE grant for feasibility study (completed successfully, published in 1999, 45 pages peer-reviewed article NIM-Sec. A, vol. 436, 1999, pp.341-385), the suppression continued. The latest example includes Crosetto’s two 2-page papers suppressed from the 2025 IEEE-NSS-MIC-RTSD Conference in Yokohama (Japan 1-8 November 2025. https://bit.ly/45K6BFz and https://bit.ly/41hKwgk).

He has also not received an answer to his following enquiry with IEEE leaders:

####### Begin of the message #######
Please provide any example of a project or paper offering equal or superior advantages to my single-board 3D-Flow design, which is adaptable to various form factors such as 6U VME64, ATCA, 9U VME, or VXI.

The specifications for the ATCA, 9U VME, or VXI implementations are:

  • Single Board: A 66-IC board (8,448 PEs), $7,000 cost, 330W dissipation.
    • Configurable for: 128 channels/9,672 operations, 256 channels/4,836 operations, or 512 channels/2,418 operations.
  • 8-Board Crate: 68,352 PEs, $85,500 cost, 3,000W dissipation.
    • Supporting: 1,024 channels/9,672 operations, 2,048 channels/4,836 operations, or 4,096 channels/2,418 operations on datasets arriving every 25 nanoseconds with no data loss.

####### End of the message #######

Crosetto also informed the scientific community with seminars at research centers.

In 2009, he was invited by Ralph James to give a presentation of his inventions at Brookhaven National Laboratory to joint physics/biomedical groups. The seminar—video-recorded and attended by Dr. Joanna Fowler, who that same year received the National Medal of Scienceconcluded without any refutation.

Since 2014, Crosetto has independently disseminated his work — in a 1 × 1.5 m poster and by distributing summaries of his inventions — at CERN Open Days, at the DOE, the NIH, and at IEEE NSS-MIC-RTSD conferences, including 2014 Seattle; 2016 Strasbourg; 2017 Atlanta; 2018 Sydney; 2019 Manchester; 2022 Milan; 2023 Vancouver.

In 2016, Crosetto met the IEEE-NPSS Presidents (100-minute meeting, Strasbourg); in 2019 the IEEE President elect and; in 2024 all seven Chairs of IEEE-NSS-MIC-RTSD Conference, thanking them for approving his six papers and two-hour presentation).

After the 2024 conference, instead of refuting Crosetto’s scientific claims, organizers re-classified his papers from N-29 (meaning (NSS-29) to WS-29 (meaning Worshop-29), breaking the IEEE web links, making abstracts inaccessible, and creating inconsistencies with the printed book of abstracts. Shortly after the conference, without being notified, my video was removed and then reinstated as they responded to his concerns, but by then the damage was done.

In January 2025, a former IEEE/NPSS President editor of scientific journals, suggested publication on TechArchiv which Crosetto submitted 14 April 2025 — however, he agreed that my article should be suppressed.

After experiencing several years of blocked email and telephone communications with CERN, Crosetto addressed a confidential letter to the CERN Legal Department, entitled:

A Respectful Request to Identify the Authority at CERN Who Is Blocking my Communications, Not Answering Legitimate Scientific Questions, Hindering Transparency in Science, and Thereby Harming the Public.’ (https://bit.ly/3Ju127c).

Through CERN’s Service Desk, he was able to demonstrate that his communications had been obstructed for an extended period. Initially, a ticket was assigned to his inquiry; however, it was later closed without any response. In subsequent attempts, no ticket was issued, despite confirmation via telephone that his email had been received.

On 20 December 2024, Service Desk personnel confirmed by phone that both Crosetto’s email and telephone communications were blocked, stating that his documents was considered ‘nonsense.’ He respectfully requested to speak directly with a member of the Legal Department, seeking assistance in establishing communication with the CERN authority responsible for evaluating scientific material. Crosetto wanted to explained that the use of FPGAs for Level-1 Trigger systems represents what is truly ‘nonsense,’ as it will result in over $12 billion in taxpayer waste during the coming decades.

However, it was denied direct contact with the Legal Department. Because his phone line was blocked, all communication had to be mediated through Service Desk staff, who relayed messages back and forth between myself and the Legal Department. Despite confirming receipt of my documents, the Legal Department refused to engage in direct dialogue and failed to provide any formal response to his letter.

Through the Service Desk mediation, Crosetto was eventually able to reach one member of the Legal Department, who refused further dialogue and did not object when he informed them that he would make public their statement. You can hear the audio (https://bit.ly/4oxFdCs) of the conversation with the Head of CERN-Service Desk: at minute 10:45 stating that the order to block Crosetto’s number came from the Office of the Director General, Fabiola Gianotti; at minute 11:10 he stated that his documentation is a ‘nonsense’, and at 12:06 Service Desk person stated again that CERN blocked Crosetto number.

___________________________________

Continuing the Effort for Transparency and Scientific Dialogue

Once again, since Crosetto cannot communicate openly with his colleagues — as Einstein, Lord Kelvin, Sagan, and others once could — to resolve this contradiction that harms science, taxpayers, and cancer patients, and since he has not received any response from the CERN Director-General to his letter (https://bit.ly/3Lv1umc) dated 09/10/2025, from the CERN Legal Department to his letter (https://bit.ly/3Ju127c) sent the same day, nor from the IEEE CEO and Presidents to his letter (https://bit.ly/4hzlFLV) sent on 09/11/2025, and to his letter (HTML https://bit.ly/41TMUKF PDFhttps://bit.ly/3VPIFvY) sent on 09/15/2025 to Texas Secretary of State Jane Nelson, Crosetto will once again prepare a large poster to carry in my hands and distribute this press release to inform my peers at the IEEE-NSS-MIC-RTSD Conference in Yokohama, Japan, on 1–8 November 202.

For more than two decades, Texas Secretary of State, Jane Nelson have maintained a relationship with Crosetto’s native town of Monasterolo di Savigliano in the Province of Cuneo, Italy, following the cultural exchange he initiated in 1997 with a town in Texas.

On 12-13 September 2025 she was at the festivities in Crosetto’s hometown of Monasterolo (he could only go the week after) and on 21 October 2025 she received at the Capitol in Austin, Texas a delegation of 23 Italians guided from the Mayor and public officers from my home town of Monasterolo di Savigliano.

As a former State Senator, Honorable Jane Nelson was instrumental in allocating $6 billion in public funds through CPRIT to fight cancer. Now, as Secretary of State, she is in a unique position to safeguard transparency, accountability, and measurable results for both taxpayers and patients.

Given the fact that Crosetto has demonstrated the feasibility and functionality of his 3D-Flow and 3D-CBS inventions for cost-effective early cancer detection, with the potential to halve premature cancer deaths that has been unrefuted by over two decades, this leads logically to the following path forward—and that logical step is to have her organize a public meeting between Crosetto and CPRIT scientists, who have already allocated $3.65 billion to projects from the $6 billion she helped secure.

Crosetto’s request is not seeking favoritisms, but rather to help her achieve the goal stated at [https://www.youtube.com/watch?v=v7VJhz7easo], which is the desire of all of us, by aligning his research with the efforts funded by the $3.65 billion already deployed.

In 2017, the IEEE-NSS-MIC-RTSD General Chair authorized Crosetto to distribute his article inside the conference premises. As in previous years, Crosetto will request guidance from local organizers and law enforcement on where he may walk with the poster and hand out documents.

In 2018 (Sydney), one IEEE convener reacted aggressively to Crosetto’s document distribution; therefore, he will also send a formal letter to law enforcement requesting protection to ensure his right to share scientific information peacefully and respectfully.

Contact:
Jennifer Colburn
Crosetto Foundation for the Reduction of Cancer Deaths
DeSoto, Texas
Email: jcolburn@crosettofoundation.org

Website: https://crosettofoundation.org/
Blog: https://crosettofoundation.org/blog/
Facebook: https://www.facebook.com/profile.php?id=100064846172129
Instagram: https://www.instagram.com/dariocrosetto/
Linkedin: https://www.linkedin.com/in/dario-crosetto-4b69a1227/
X: https://x.com/crosettodario

You can support Transparency in Science by making a donation to the Crosetto Foundation for the Reduction in Cancer Deaths.

From United States at:

Per donazioni dall’Italia:

  • Banca: CRS – Cassa di Risparmio di Savigliano
  • Conto intestato a: Associazione Fondazione Crosetto - ODV - ONLUS
  • IBAN: IT53E063054640000050129593
  • BIC: SARCIT2S
  • Puoi contribuire con il 5 per mille indicando il Codice Fiscale: 962079895.

Every contribution, no matter how small, helps us publish additional press releases, reach more decision-makers, and accelerate the funding for these breakthrough inventions, to advance science, to save billions of taxpayer Euros and to build life-saving devices that have the potential to halve premature cancer deaths and costs.

APPENDIXES:

APPENDIX A: Callouts

  1. Crosetto 3D-Flow: A Breakthrough Invention Recognized 32 Years Ago That Could Have, and Can Still, Save Billions of Euros and Millions of Lives”

  2. “CERN and IEEE’s 32-Year Blunders: 1) Suppressing the 3D-Flow breakthrough invention, 2) Using FPGA for a task it was never design to perform

  3. “FPGAs cannot execute complex pattern recognition algorithms at ultra-high input data rates with no data loss, due to architectural limits”

  4. “Increasing parallelism creates a self-defeating cycle of more routing transistors, which slow algorithm execution while increasing power consumption”

  5. “Einstein's Blunder: He admitted his error after 14 years. An example of true scientific integrity (as Sagan, Darwin, Lord Kelvin and others)”

  6. Evidence Against Evidence: Science is the recognition of evidence and the laws of nature; not authority or consensus

  7. “Truth in science isn’t set by popular majority consensus, CERN’s 14 000 scientists, or IEEE’s 480 000 members, but by evidence”

  8. Quantify FPGA performance and cost; compare with the 3D-Flow $27 per channel for 4,800 operations per dataset arriving every 25 ns, with no data loss”

  9. Any refusal by CERN and IEEE officials who hold positions of responsibility to engage with verifiable claims will not evade their scientific duty

  10. “32 Years of Suppression and Ongoing Barriers to Transparency. A Call for responsibility to address and resolve contradictions in science”

APPENDIX B: Email from 2024 IEEE-NSS-MIC-RTSD Keynote speaker

From: Aarrestad Thea <arthea@ethz.ch>
Sent: Wednesday, October 22, 2025 2:01 AM
To: Verboncoeur, John <johnv@msu.edu>
Cc: crosettodario@gmail.com; stefan.ritt@psi.ch; fabrisl@ornl.gov; pozzisa@umich.edu
Subject: Re: revised response: Request for Scientific Collaboration and Clarification on Rejection of My Paper

Dear Dr. Crosetto,

Thank you for your message. I would like to echo John Verboncoeur’s opinion. Meaningful scientific progress depends on constructive, collegial dialogue and established processes of peer review and collaboration. It does not take place through private email threads that include individuals chosen for their perceived seniority or influence depending on the topic under discussion. The CMS Trigger system is developed within a large, structured collaboration of several thousand members, and individual researchers cannot independently organize or authorize meetings or technical reviews on its behalf.

With that, I will not be engaging further in this discussion or providing additional comments. Please also remove me from further CC in this thread.

Best regards,
Thea K. Aarrestad

APPENDIX C: FPGA architecture not suitable for executing complex pattern recognition algorithms on ultra-high input data rates with no data loss

Regardless of the number of transistors on a single FPGA chip—whether 10 billion or 20 billion—or the use of 7 nm or 4 nm FinFET technology, FPGAs will never meet LHC requirements, even if designers build a 200-trillion-transistor system to replace the current CERN-CMS 20-trillion-transistor, 650 kW system. This is due to inherent architectural inefficiency, as quantified below:

Extracted from page 49 of https://bit.ly/4e1uURA
Table VIII. Estimated Transistors per function for FPGA Xilinx Virtex UltraScale VU13P with 12.5 billion transistors.

FPGA Virtex Ultrascale VU13PEstimated Transistor Contribution% of Total
Logic (LUTs + Flip-Flops)1-2 billion10-15%
Routing & Interconnects4-5 billion25-35%
Block RAM (BRAM)2-3 billion15-20%
DSP Blocks2-3 billion10-15%
Configuration Memory (SRAM cells, bitstream storage)2-3 billion15-20%
I/O Buffers & Miscellaneous1-2 billion10-15%

Extracted from page 48 of https://bit.ly/4e1uURA
Table VI. Performance, power consumption and cost comparison between Intel i7-8550U and FPGA VU19P - FPGA VU19P cost 1000x, require 10x the power supply to achieve a fraction of the performance of Intel i7, possibly 10-100x slower per core.

MetricIntel i7-8550UFPGA VU19P Emulating i7
Process node14nm FINFET7nm FINFET
Transistor count~3 billion~35 billion
Clock FrequencyUp to 3.9 GHz~100-300 MHz
Power EfficiencyHighly optimized ASICGeneral purpose programmable logic (inefficient)
Performance MatchingNative hardwareEmulation (likely 10-100x slower per core)
Power consumption15-35W~250-350W
Cost$100 (eBay)$10,000 (Retail/Single)

FPGAs are versatile, reconfigurable integrated circuits designed for programmable ancillary logic and controllers, and for testing in hardware the functionality of new CPUs, GPUs, microcontrollers and other processor architectures. However, their architecture is unsuitable for applications that require executing complex pattern recognition algorithms on ultra-high input data rates without data loss.

FPGAs are built on a structure of logic blocks interconnected by a vast, flexible routing network.

  • The Problem: The limitation of FPGAs stems from their extensive, general-purpose routing network. When implementing highly complex algorithms (such as advanced pattern recognition Level-2 Trigger algorithms at Level-1) that require intensive communication between logic blocks, the routing network becomes the dominant limiting factor.

  • Self-Defeating Cycle: To handle high-input data rates and the need to execute algorithms longer than the interval between consecutive input data, more logic blocks (parallelism) are used. This, in turn, demand more complex and extended signal routing. The resulting increased in routing capacitance and transistor count slows down overall execution, increases power consumption, and impose practical limit on clock speed and algorithm complexity.

  • The following figures provided by the XILINX (an FPGA manufacturer, also shown on Figures 39 and 40 on page 49  of https://bit.ly/4e1uURA), illustrate the FPGA architectural structure:

Figure 39 on page 49  of https://bit.ly/4e1uURA. Xilinx Logic BELs are magenta, Routing BELs are green.

Figure 40 on page 49  of https://bit.ly/4e1uURA. Levels of architectural hierarchy in Xilinx FPGAs.

The Failure of FPGA Architecture

These inherent FPGA architectural limits are the technical and scientific reasons why the 20-trillion-transistor, 650 kW CERN-CMS FPGA system, just built for 2026-2036 CERN experiments, and all similar systems, must be discarded. Their use will result in an estimated $12 billion in taxpayer waste over the next decade.

The problem lies deep within the architecture: regardless of transistor count (whether 10 billion or 20 billion per FPGA chip) or the use of cutting-edge 7 nm or 4 nm FinFET technology, FPGAs will never meet the requirements of the Large Hadron Collider (LHC), even if designers attempt to build a 200-trillion-transistor system, megawatts power.

_____________________________________

APPENDIX D: Decades informing scientific leaders, decision makers and the general public about the contradictions: 1) Suppressing the 3D-Flow breakthrough invention that could have, and can still, save billions of euros and millions of lives, 2) Using FPGA for a task it was never design to perform.

To ensure transparency, Crosetto has invested decades in informing Members of the European Parliament, scientific leaders (IEEE, CERN, CPRIT), and the general public. The table below documents the reach, readership, and media placement of his most recent press releases and communications.

Link to the 28 August 2025 Press release:
PDF: https://bit.ly/3UCW8XE;
HTML: https://www.globenewswire.com/news-release/2025/08/28/3140915/0/en/Urgent-Appeal-Freeze-CERN-Funding-Fund-Innovations-Suppressed-for-32-Years-That-Can-Save-Millions-of-Lives-and-Billions-of-Euros.html

Table Key:

  • Lang.: Language (EN = English, FR = French, DE = German, IT = Italian)
  • MEPs: Members of the European Parliament
  • Sci.: Scientists, IEEE, CERN, Leaders
  • Pub.: General Public, Media, Journalists (Total Potential Reach: M = million, K = thousand)
  • To: Recipients (Total Potential Reach / Known Unique Readers) + unknown readers
  • Placed: Number of media outlets publishing (see thousands of links at https://bit.ly/3HtisQv)
DateLang.LinkToPlaced
09/15/2025ENhttps://bit.ly/41TMUKFPub (142M/11K)804
09/06/2025ENhttps://bit.ly/3HYBePYPub (145M/23K)876
08/28/2025ENhttps://bit.ly/4p0DneCPub (126M/33K), MEPs (720/420), Sci (40/27)597
07/15/2025ENhttps://bit.ly/4m57FKZPub (87M/10K), MEPs (720/41), Sci (40/14)N/A
07/04/2025FRhttps://bit.ly/4lfjnTePub (8.3M/6.9K)421
07/04/2005DEhttps://bit.ly/3TTV0ybPub (11.3M/6.8K)487
07/04/2025IThttps://bit.ly/4loi7goN/A<5
07/03/2025ENhttps://bit.ly/44cIbVQPub (63.7M/6.6K), MEPs (720/448)441
06/30/2025ENhttps://bit.ly/3TMnDNIN/AN/A
06/30/2025IThttps://bit.ly/4nsvk9EN/A<5
06/23/2025ENhttps://bit.ly/4era28bMEPs (720/423)N/A
06/23/2025IThttps://bit.ly/3T7G1R8N/A<5

Contact list of key scientists and decision-makers

The following is a list of scientists and leaders to whom this and other press releases have been sent. This communication is intended to inform key decision-makers and promote public discussion.

We encourage anyone to contact these individuals to foster dialogue and cooperation in resolving inconsistencies that hinder scientific progress. Only publicly available contact information has been provided to protect their privacy.

To: Japanese Scientific Leadership and colleagues: akira.yoshikawa.d8@tohoku.ac.jp; teiji.tominaga.a3@tohoku.ac.jp; kokusai-k@grp.tohoku.ac.jp; asugimoto@m.tohoku.ac.jp; hisyo@grp.tohoku.ac.jp; yamaya.taiga@qst.go.jp; takhshhr@komazawa-u.ac.jp; hiroyuki@ad.unc.edu; yasuo.arai@kek.jp; nomachi@rcnp.osaka-u.ac.jp; kurosawa@imr.tohoku.ac.jp; tadayuki.takahashi@ipmu.jp; info-toshokan@komazawa-u.ac.jp; kokusaicenter@komazawa-u.ac.jp ; naohito.saito@kek.jp; yutaka.ushiroda@kek.jp; takeshi.komatsubara@kek.jp; makoto.tomoto@kek.jp; director@rcnp.osaka-u.ac.jp; Furuhara@imr.tohoku.ac.jp; junichi.yokoyama@ipmu.jp; aihara@phys.s.u-tokyo.ac.jp; yukari.ito@ipmu.jp; mark.vagins@ipmu.jp; kifu@qst.go.jp; kanno@nirs.go.jp;

To: IEEE Leadership,
Kathleen A. Kramer, 2025 Pres. & CEO of IEEE, kramer@sandiego.edu
Mary Ellen Randal 2025 IEEE President Elect, president@ieee.org;
Tom Coughlin, 2024 President and CEO of IEEE, tomcoughlin@ieee.org
José Moura, 2019 President and CEO of IEEE, moura@ece.cmu.edu
John Verboncoeur, Editor for Physics of Plasma, Vice President IEEE Technical Activities, johnv@msu.edu.
Lorenzo Fabris, 2024 IEEE-NSS-MIC-RTSD Chair, fabrisl@ornl.gov,
Ralf Engels, 2024 IEEE-NSS-MIC-RTSD Coord, r.engels@fz-juelich.de
Anatoly Rozenfeld, 2018 IEEE-NSS-MIC-RTSD Chair; anatoly@uow.edu.au  
John Aarsvold, 2017 IEEE-NSS-MIC-RTSD Chair, jaarsvo@emory.edu
Ralph James, 2003 IEEE-NSS-MIC-RTSD Chair, Ralph.James@srnl.doe.gov
Sara Pozzi, 2025 IEEE-NPSS President, pozzisa@umich.edu

To: CERN
Fabiola Gianotti, CERN Director General, dg.office@cern.ch; Fabiola.Gianotti@cern.ch; service-desk@cern.ch; Council.Secretariat@cern.ch; Costas.Fountas@cern.ch; klaus.desch@cern.ch
Thea Aarrestad, 2024 IEEE-NSS-MIC-RTSD Keynote speaker, arthea@ethz.ch;
Gautier Hamel de Monchenault, Spokesperson of CERN-CMS, gautier.hamel-de-monchenault@cea.fr;
Hafeez Hoorani, Deputy Spokesperson of CERN-CMS, hoorani@ncp.edu.pk    
Anadi Canepa, Deputy Spokesperson of CERN-CMS, acanepa@fnal.gov
Andrew Lankford, Appointed by CERN DG (Feb 2017) to organize a 3D-Flow public meeting with Crosetto (never held), andrew.lankford@uci.edu
Joel Butler, Appointed by CERN DG (Feb 2017) to organize a 3D-Flow public meeting with Crosetto (never held) butler@fnal.gov
Nadia Pastrone, Appointed by CERN DG (Feb 2017) to organize a 3D-Flow public meeting with Crosetto (never held), nadia.pastrone@to.infn.it

To: Distinguished Scientists, Esteemed Colleagues,

Cc: Bertrand Salami, Head of CERN HR Legal and Social Matters group. Email Bertrand.Salami@cern.ch

Cc: Members of the European Parliament (MEPs); https://www.europarl.europa.eu/meps/en/full-list/all  

Cc: Parliamentarians of CERN Member States: https://secure.ipex.eu/IPEXL-WEB/parliaments/list_parliaments

Cc: Parliamentarians of CERN Associated States, and Observer States; United States Representatives, https://www.house.gov/representatives/find-your-representative

Cc: Pontifical Academy of Sciences: jvonbraun@uni-bonn.de; pas@pas.va; segreteria@humandevelopment.va;

Cc: Hon. Jane Nelson, Texas Secretary of State, secretary@sos.texas.gov;


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